Compare and Contrast HiSIM-HV and BSIM based compact model of High Voltage MOSFETs for Analog Applications

A pair of scalable models, one utilizing the Surface Potential-based HiSIM-HV 1.0.2 model, and the other, the conventional Vth-based BSIM3v3.24 model, were extracted based on a test vehicle designed with both Drain-Extended CMOS and LDMOS Transistors. All devices were designed with a single fixed channel length but varying drift length and width. The test vehicle is processed using Fairchild Semiconductor’s 0.35μm, BiCMOS/DMOS process. The key difference between the HiSIM-HV and BSIM3-based macro models is that BSIM3 model required additional elements to model the extended drift region where the potential based HiSIM-HV contains an intrinsic drift element. The two models are then compared and contrasted in two major areas: 1) Model Accuracies, including Ldr (Length of the drift region) scaling, 2) Model Performance in an actual CAD Environment, Cadence ADE running MMSIM 7.1 in this case, including simulation speeds, convergence stability, relative accuracies under both DC and Transient Simulations. Finally, conclusions are presented to reflect the viability of each model in the current Analog-Mixed-Signal Applications and Designs.